#include <arion/common/arch_manager.hpp>#include <arion/common/global_defs.hpp>#include <arion/platforms/linux/lnx_kernel_utils.hpp>#include <cstdint>#include <map>#include <string>Go to the source code of this file.
Classes | |
| class | arion_arm::ArchManagerARM |
| A class responsible for performing architecture specific operations in case of an ARM chip emulation. More... | |
Namespaces | |
| namespace | arion_arm |
Macros | |
| #define | ARION_ARM_MODE 0 |
| Value of the CPSR thumb bit for ARM mode. | |
| #define | ARION_THUMB_MODE 1 |
| Value of the CPSR thumb bit for THUMB mode. | |
| #define | ARION_ARM_CPSR_THUMB_BIT (1 << 5) |
| Mask for the ARM CPSR thumb bit. | |
Variables | |
| std::map< uint64_t, std::string > | arion_arm::NAME_BY_SYSCALL_NO |
| A map identifying an ARM syscall name given its number. | |
| std::map< std::string, arion::REG > | arion_arm::ARCH_REGS |
| A map identifying a Unicorn ARM register given its name. | |
| std::map< arion::REG, uint8_t > | arion_arm::ARCH_REGS_SZ |
| A map identifying a Unicorn ARM register size given the register. | |
| std::vector< arion::REG > | arion_arm::CTXT_REGS |
| The list of high-level ARM registers that make up the context to be saved and restored. | |
| std::map< uint64_t, arion::CPU_INTR > | arion_arm::IDT = {} |
| The ARM Interrupt Descriptor Table. | |
| arion::ABI_REGISTERS | arion_arm::ABI_REGS = arion::ABI_REGISTERS(UC_ARM_REG_PC, UC_ARM_REG_SP) |
| Unicorn ARM PC and SP registers for genericity. | |
| arion::ABI_CALLING_CONVENTION | arion_arm::ABI_CALLING_CONV |
| Unicorn ARM registers involved in calling convention. | |
| arion::ABI_SYSCALLING_CONVENTION | arion_arm::ABI_SYSCALLING_CONV |
| Unicorn ARM registers involved in syscalling convention. | |
| arion::KERNEL_SEG_FLAGS | arion_arm::SEG_FLAGS = ARION_ARM_TRAPS_PRESENT |
| ARM flags telling the loader which kernel segments should be mapped in memory. | |
| uint32_t | arion_arm::HWCAP2 = 0 |
| Some well working ARM chip HWCAP2 value. | |
| uint32_t | arion_arm::HWCAP = 0x001fb8d7 |
| Some well working ARM chip HWCAP value. | |
| const size_t | arion_arm::PTR_SZ = 4 |
| Size in bytes of a pointer in an ARM chip. | |
| const uint16_t | arion_arm::ARCH_SZ = 32 |
| Size in bits of the ARM general-purpose registers. | |
| arion::CPU_ARCH | arion_arm::ARCH = arion::CPU_ARCH::ARM_ARCH |
| Arion CPU_ARCH for ARM. | |
| arion::ARCH_ATTRIBUTES | arion_arm::ARCH_ATTRS |
| Multiple architecture specific attributes for ARM, grouped in a structure for genericity purpose. | |
| #define ARION_ARM_CPSR_THUMB_BIT (1 << 5) |
Mask for the ARM CPSR thumb bit.
| #define ARION_ARM_MODE 0 |
Value of the CPSR thumb bit for ARM mode.
| #define ARION_THUMB_MODE 1 |
Value of the CPSR thumb bit for THUMB mode.