Flag indicating whether floating-point registers are valid. More...
#include <lnx_arch_x86-64.hpp>
Public Attributes | |
| unsigned short | cwd |
| FPU Control Word. | |
| unsigned short | swd |
| FPU Status Word. | |
| unsigned short | twd |
| FPU Tag Word. | |
| unsigned short | fop |
| FPU Opcode. | |
| __u64 | rip |
| FPU Instruction Pointer. | |
| __u64 | rdp |
| FPU Data Pointer. | |
| __u32 | mxcsr |
| MXCSR register (SSE control/status). | |
| __u32 | mxcsr_mask |
| MXCSR mask. | |
| __u32 | st_space [32] |
| FPU stack registers ST0-ST7 (80-bit extended precision). | |
| __u32 | xmm_space [64] |
| SSE/AVX registers XMM0-XMM15 (128-bit/256-bit). | |
| __u32 | padding [24] |
| Padding for alignment. | |
Flag indicating whether floating-point registers are valid.
| unsigned short arion_lnx_x86_64::user_i387_struct::cwd |
FPU Control Word.
| unsigned short arion_lnx_x86_64::user_i387_struct::fop |
FPU Opcode.
| __u32 arion_lnx_x86_64::user_i387_struct::mxcsr |
MXCSR register (SSE control/status).
| __u32 arion_lnx_x86_64::user_i387_struct::mxcsr_mask |
MXCSR mask.
| __u32 arion_lnx_x86_64::user_i387_struct::padding[24] |
Padding for alignment.
| __u64 arion_lnx_x86_64::user_i387_struct::rdp |
FPU Data Pointer.
| __u64 arion_lnx_x86_64::user_i387_struct::rip |
FPU Instruction Pointer.
| __u32 arion_lnx_x86_64::user_i387_struct::st_space[32] |
FPU stack registers ST0-ST7 (80-bit extended precision).
| unsigned short arion_lnx_x86_64::user_i387_struct::swd |
FPU Status Word.
| unsigned short arion_lnx_x86_64::user_i387_struct::twd |
FPU Tag Word.
| __u32 arion_lnx_x86_64::user_i387_struct::xmm_space[64] |
SSE/AVX registers XMM0-XMM15 (128-bit/256-bit).