arion_x86 Namespace Reference

Classes
class	ArchManagerX86
	A class responsible for performing architecture specific operations in case of an x86 chip emulation. More...

Variables
std::map< uint64_t, std::string >	NAME_BY_SYSCALL_NO
	A map identifying a x86 syscall name given its number.
std::map< std::string, arion::REG >	ARCH_REGS
	A map identifying a Unicorn x86 register given its name.
std::map< arion::REG, uint8_t >	ARCH_REGS_SZ
	A map identifying a Unicorn x86 register size given the register.
std::vector< arion::REG >	CTXT_REGS
	The list of high-level x86 registers that make up the context to be saved and restored.
std::map< uint64_t, arion::CPU_INTR >	IDT
	The x86 Interrupt Descriptor Table.
arion::ABI_REGISTERS	ABI_REGS = arion::ABI_REGISTERS(UC_X86_REG_EIP, UC_X86_REG_ESP)
	Unicorn x86 PC and SP registers for genericity.
arion::ABI_CALLING_CONVENTION	ABI_CALLING_CONV = arion::ABI_CALLING_CONVENTION(UC_X86_REG_EAX, {})
	Unicorn x86 registers involved in calling convention.
arion::ABI_SYSCALLING_CONVENTION	ABI_SYSCALLING_CONV
	Unicorn x86 registers involved in syscalling convention.
arion::KERNEL_SEG_FLAGS	SEG_FLAGS = ARION_VVAR_PRESENT | ARION_VDSO_PRESENT
	x86 flags telling the loader which kernel segments should be mapped in memory.
uint32_t	HWCAP2 = 2
	Some well working x86 chip HWCAP2 value.
uint32_t	HWCAP = 0xbfebfbff
	Some well working x86 chip HWCAP value.
const size_t	PTR_SZ = 4
	Size in bytes of a pointer in a x86 chip.
const uint16_t	ARCH_SZ = 32
	Size in bits of the x86 general-purpose registers.
arion::CPU_ARCH	ARCH = arion::CPU_ARCH::X86_ARCH
	Arion CPU_ARCH for x86.
arion::ARCH_ATTRIBUTES	ARCH_ATTRS
	Multiple architecture specific attributes for x86, grouped in a structure for genericity purpose.

Variable Documentation

ABI_CALLING_CONV

arion::ABI_CALLING_CONVENTION arion_x86::ABI_CALLING_CONV = arion::ABI_CALLING_CONVENTION(UC_X86_REG_EAX, {})

inline

Unicorn x86 registers involved in calling convention.

ABI_REGS

arion::ABI_REGISTERS arion_x86::ABI_REGS = arion::ABI_REGISTERS(UC_X86_REG_EIP, UC_X86_REG_ESP)

inline

Unicorn x86 PC and SP registers for genericity.

ABI_SYSCALLING_CONV

arion::ABI_SYSCALLING_CONVENTION arion_x86::ABI_SYSCALLING_CONV

inline

Initial value:

= arion::ABI_SYSCALLING_CONVENTION(
    UC_X86_REG_EAX, UC_X86_REG_EAX,
    {UC_X86_REG_EBX, UC_X86_REG_ECX, UC_X86_REG_EDX, UC_X86_REG_ESI, UC_X86_REG_EDI, UC_X86_REG_EBP})

Unicorn x86 registers involved in syscalling convention.

ARCH

arion::CPU_ARCH arion_x86::ARCH = arion::CPU_ARCH::X86_ARCH

inline

Arion CPU_ARCH for x86.

ARCH_ATTRS

arion::ARCH_ATTRIBUTES arion_x86::ARCH_ATTRS

inline

Initial value:

=
    arion::ARCH_ATTRIBUTES(ARCH, ARCH_SZ, PTR_SZ, HWCAP, HWCAP2, SEG_FLAGS, ABI_REGS, ABI_CALLING_CONV,
                           ABI_SYSCALLING_CONV, NAME_BY_SYSCALL_NO)

Multiple architecture specific attributes for x86, grouped in a structure for genericity purpose.

ARCH_REGS

std::map<std::string, arion::REG> arion_x86::ARCH_REGS

inline

Initial value:

= {
    {"AH", UC_X86_REG_AH},       {"AL", UC_X86_REG_AL},         {"AX", UC_X86_REG_AX},     {"BH", UC_X86_REG_BH},
    {"BL", UC_X86_REG_BL},       {"BP", UC_X86_REG_BP},         {"BPL", UC_X86_REG_BPL},   {"BX", UC_X86_REG_BX},
    {"CH", UC_X86_REG_CH},       {"CL", UC_X86_REG_CL},         {"CS", UC_X86_REG_CS},     {"CX", UC_X86_REG_CX},
    {"DH", UC_X86_REG_DH},       {"DI", UC_X86_REG_DI},         {"DIL", UC_X86_REG_DIL},   {"DL", UC_X86_REG_DL},
    {"DS", UC_X86_REG_DS},       {"DX", UC_X86_REG_DX},         {"EAX", UC_X86_REG_EAX},   {"EBP", UC_X86_REG_EBP},
    {"EBX", UC_X86_REG_EBX},     {"ECX", UC_X86_REG_ECX},       {"EDI", UC_X86_REG_EDI},   {"EDX", UC_X86_REG_EDX},
    {"EIP", UC_X86_REG_EIP},     {"ES", UC_X86_REG_ES},         {"ESI", UC_X86_REG_ESI},   {"ESP", UC_X86_REG_ESP},
    {"FPSW", UC_X86_REG_FPSW},   {"FS", UC_X86_REG_FS},         {"GS", UC_X86_REG_GS},     {"IP", UC_X86_REG_IP},
    {"SI", UC_X86_REG_SI},       {"SIL", UC_X86_REG_SIL},       {"SP", UC_X86_REG_SP},     {"SPL", UC_X86_REG_SPL},
    {"SS", UC_X86_REG_SS},       {"CR0", UC_X86_REG_CR0},       {"CR1", UC_X86_REG_CR1},   {"CR2", UC_X86_REG_CR2},
    {"CR3", UC_X86_REG_CR3},     {"CR4", UC_X86_REG_CR4},       {"CR8", UC_X86_REG_CR8},   {"DR0", UC_X86_REG_DR0},
    {"DR1", UC_X86_REG_DR1},     {"DR2", UC_X86_REG_DR2},       {"DR3", UC_X86_REG_DR3},   {"DR4", UC_X86_REG_DR4},
    {"DR5", UC_X86_REG_DR5},     {"DR6", UC_X86_REG_DR6},       {"DR7", UC_X86_REG_DR7},   {"FP0", UC_X86_REG_FP0},
    {"FP1", UC_X86_REG_FP1},     {"FP2", UC_X86_REG_FP2},       {"FP3", UC_X86_REG_FP3},   {"FP4", UC_X86_REG_FP4},
    {"FP5", UC_X86_REG_FP5},     {"FP6", UC_X86_REG_FP6},       {"FP7", UC_X86_REG_FP7},   {"R8", UC_X86_REG_R8},
    {"ST0", UC_X86_REG_ST0},     {"ST1", UC_X86_REG_ST1},       {"ST2", UC_X86_REG_ST2},   {"ST3", UC_X86_REG_ST3},
    {"ST4", UC_X86_REG_ST4},     {"ST5", UC_X86_REG_ST5},       {"ST6", UC_X86_REG_ST6},   {"ST7", UC_X86_REG_ST7},
    {"XMM0", UC_X86_REG_XMM0},   {"XMM1", UC_X86_REG_XMM1},     {"XMM2", UC_X86_REG_XMM2}, {"XMM3", UC_X86_REG_XMM3},
    {"XMM4", UC_X86_REG_XMM4},   {"XMM5", UC_X86_REG_XMM5},     {"XMM6", UC_X86_REG_XMM6}, {"XMM7", UC_X86_REG_XMM7},
    {"YMM0", UC_X86_REG_YMM0},   {"YMM1", UC_X86_REG_YMM1},     {"YMM2", UC_X86_REG_YMM2}, {"YMM3", UC_X86_REG_YMM3},
    {"YMM4", UC_X86_REG_YMM4},   {"YMM5", UC_X86_REG_YMM5},     {"YMM6", UC_X86_REG_YMM6}, {"YMM7", UC_X86_REG_YMM7},
    {"IDTR", UC_X86_REG_IDTR},   {"GDTR", UC_X86_REG_GDTR},     {"LDTR", UC_X86_REG_LDTR}, {"TR", UC_X86_REG_TR},
    {"FPCW", UC_X86_REG_FPCW},   {"FPTAG", UC_X86_REG_FPTAG},   {"MSR", UC_X86_REG_MSR},   {"MXCSR", UC_X86_REG_MXCSR},
    {"FLAGS", UC_X86_REG_FLAGS}, {"EFLAGS", UC_X86_REG_EFLAGS}, {"FIP", UC_X86_REG_FIP},   {"FCS", UC_X86_REG_FCS},
    {"FDP", UC_X86_REG_FDP},     {"FDS", UC_X86_REG_FDS},       {"FOP", UC_X86_REG_FOP}}

A map identifying a Unicorn x86 register given its name.

ARCH_REGS_SZ

std::map<arion::REG, uint8_t> arion_x86::ARCH_REGS_SZ

inline

Initial value:

= {
    {UC_X86_REG_AH, 1},    {UC_X86_REG_AL, 1},    {UC_X86_REG_AX, 2},     {UC_X86_REG_BH, 1},    {UC_X86_REG_BL, 1},
    {UC_X86_REG_BP, 2},    {UC_X86_REG_BPL, 1},   {UC_X86_REG_BX, 2},     {UC_X86_REG_CH, 1},    {UC_X86_REG_CL, 1},
    {UC_X86_REG_CS, 2},    {UC_X86_REG_CX, 2},    {UC_X86_REG_DH, 1},     {UC_X86_REG_DI, 2},    {UC_X86_REG_DIL, 1},
    {UC_X86_REG_DL, 1},    {UC_X86_REG_DS, 2},    {UC_X86_REG_DX, 2},     {UC_X86_REG_EAX, 4},   {UC_X86_REG_EBP, 4},
    {UC_X86_REG_EBX, 4},   {UC_X86_REG_ECX, 4},   {UC_X86_REG_EDI, 4},    {UC_X86_REG_EDX, 4},   {UC_X86_REG_EIP, 4},
    {UC_X86_REG_ES, 2},    {UC_X86_REG_ESI, 4},   {UC_X86_REG_ESP, 4},    {UC_X86_REG_FPSW, 2},  {UC_X86_REG_FS, 2},
    {UC_X86_REG_GS, 2},    {UC_X86_REG_IP, 2},    {UC_X86_REG_SI, 2},     {UC_X86_REG_SIL, 1},   {UC_X86_REG_SP, 2},
    {UC_X86_REG_SPL, 1},   {UC_X86_REG_SS, 2},    {UC_X86_REG_CR0, 8},    {UC_X86_REG_CR1, 8},   {UC_X86_REG_CR2, 8},
    {UC_X86_REG_CR3, 8},   {UC_X86_REG_CR4, 8},   {UC_X86_REG_CR8, 8},    {UC_X86_REG_DR0, 8},   {UC_X86_REG_DR1, 8},
    {UC_X86_REG_DR2, 8},   {UC_X86_REG_DR3, 8},   {UC_X86_REG_DR4, 8},    {UC_X86_REG_DR5, 8},   {UC_X86_REG_DR6, 8},
    {UC_X86_REG_DR7, 8},   {UC_X86_REG_FP0, 10},  {UC_X86_REG_FP1, 10},   {UC_X86_REG_FP2, 10},  {UC_X86_REG_FP3, 10},
    {UC_X86_REG_FP4, 10},  {UC_X86_REG_FP5, 10},  {UC_X86_REG_FP6, 10},   {UC_X86_REG_FP7, 10},  {UC_X86_REG_ST0, 10},
    {UC_X86_REG_ST1, 10},  {UC_X86_REG_ST2, 10},  {UC_X86_REG_ST3, 10},   {UC_X86_REG_ST4, 10},  {UC_X86_REG_ST5, 10},
    {UC_X86_REG_ST6, 10},  {UC_X86_REG_ST7, 10},  {UC_X86_REG_XMM0, 16},  {UC_X86_REG_XMM1, 16}, {UC_X86_REG_XMM2, 16},
    {UC_X86_REG_XMM3, 16}, {UC_X86_REG_XMM4, 16}, {UC_X86_REG_XMM5, 16},  {UC_X86_REG_XMM6, 16}, {UC_X86_REG_XMM7, 16},
    {UC_X86_REG_YMM0, 32}, {UC_X86_REG_YMM1, 32}, {UC_X86_REG_YMM2, 32},  {UC_X86_REG_YMM3, 32}, {UC_X86_REG_YMM4, 32},
    {UC_X86_REG_YMM5, 32}, {UC_X86_REG_YMM6, 32}, {UC_X86_REG_YMM7, 32},  {UC_X86_REG_IDTR, 24}, {UC_X86_REG_GDTR, 24},
    {UC_X86_REG_LDTR, 24}, {UC_X86_REG_TR, 24},   {UC_X86_REG_FPCW, 2},   {UC_X86_REG_FPTAG, 2}, {UC_X86_REG_MSR, 16},
    {UC_X86_REG_MXCSR, 4}, {UC_X86_REG_FLAGS, 2}, {UC_X86_REG_EFLAGS, 4}, {UC_X86_REG_FIP, 8},   {UC_X86_REG_FCS, 2},
    {UC_X86_REG_FDP, 8},   {UC_X86_REG_FDS, 2},   {UC_X86_REG_FOP, 2}}

A map identifying a Unicorn x86 register size given the register.

ARCH_SZ

const uint16_t arion_x86::ARCH_SZ = 32

inline

Size in bits of the x86 general-purpose registers.

CTXT_REGS

std::vector<arion::REG> arion_x86::CTXT_REGS

inline

Initial value:

= {
    UC_X86_REG_FS,   UC_X86_REG_GS,   UC_X86_REG_EAX,   UC_X86_REG_EBP,  UC_X86_REG_EBX,  UC_X86_REG_ECX,
    UC_X86_REG_EDI,  UC_X86_REG_EDX,  UC_X86_REG_EIP,   UC_X86_REG_ESI,  UC_X86_REG_ESP,  UC_X86_REG_SS,
    UC_X86_REG_CS,   UC_X86_REG_DS,   UC_X86_REG_FP0,   UC_X86_REG_FP1,  UC_X86_REG_FP2,  UC_X86_REG_FP3,
    UC_X86_REG_FP4,  UC_X86_REG_FP5,  UC_X86_REG_FP6,   UC_X86_REG_FP7,  UC_X86_REG_ST0,  UC_X86_REG_ST1,
    UC_X86_REG_ST2,  UC_X86_REG_ST3,  UC_X86_REG_ST4,   UC_X86_REG_ST5,  UC_X86_REG_ST6,  UC_X86_REG_ST7,
    UC_X86_REG_YMM0, UC_X86_REG_YMM1, UC_X86_REG_YMM2,  UC_X86_REG_YMM3, UC_X86_REG_YMM4, UC_X86_REG_YMM5,
    UC_X86_REG_YMM6, UC_X86_REG_YMM7, UC_X86_REG_EFLAGS}

The list of high-level x86 registers that make up the context to be saved and restored.

HWCAP

uint32_t arion_x86::HWCAP = 0xbfebfbff

inline

Some well working x86 chip HWCAP value.

HWCAP2

uint32_t arion_x86::HWCAP2 = 2

inline

Some well working x86 chip HWCAP2 value.

IDT

std::map<uint64_t, arion::CPU_INTR> arion_x86::IDT

inline

Initial value:

= {{0, arion::DIVIDE_ERROR},
                                                  {1, arion::DEBUG_EXCEPTION},
                                                  {2, arion::NON_MASKABLE_INTR},
                                                  {3, arion::BREAKPOINT},
                                                  {4, arion::OVERFLOW},
                                                  {5, arion::BOUND_RANGE_EXCEEDED},
                                                  {6, arion::INVALID_OPCODE},
                                                  {7, arion::DEVICE_NOT_AVAILABLE},
                                                  {8, arion::DOUBLE_FAULT},
                                                  {9, arion::COPROCESSOR_SEGMENT_OVERRUN},
                                                  {10, arion::INVALID_TSS},
                                                  {11, arion::SEGMENT_NOT_PRESENT},
                                                  {12, arion::STACK_SEGMENT_FAULT},
                                                  {13, arion::GENERAL_PROTECTION_FAULT},
                                                  {14, arion::PAGE_FAULT},
                                                  {15, arion::RESERVED},
                                                  {16, arion::X87_FLOATING_POINT_EXCEPTION},
                                                  {17, arion::ALIGNMENT_CHECK},
                                                  {18, arion::MACHINE_CHECK},
                                                  {19, arion::SIMD_FLOATING_POINT_ERROR}}

The x86 Interrupt Descriptor Table.

NAME_BY_SYSCALL_NO

std::map<uint64_t, std::string> arion_x86::NAME_BY_SYSCALL_NO

inline

A map identifying a x86 syscall name given its number.

PTR_SZ

const size_t arion_x86::PTR_SZ = 4

inline

Size in bytes of a pointer in a x86 chip.

SEG_FLAGS

arion::KERNEL_SEG_FLAGS arion_x86::SEG_FLAGS = ARION_VVAR_PRESENT | ARION_VDSO_PRESENT

inline

x86 flags telling the loader which kernel segments should be mapped in memory.